Flip-Flop

A gate has no past. Give it the same inputs and it gives the same answer, every time, which is what makes it a gate. Wire two of them so that each one reads the other's output and the pair stops behaving that way: it now gives two different answers to the same inputs, and which one you get depends on what happened before. That is memory, and it is made of nothing but a loop.

Two gates, each one reading the other's answer

S=0 R=0

NOR0Q
NOR1NOT-Q

Each pass is one trip round the loop. The pair has settled when a pass changes nothing.

    Nothing above is a recording. These ran in this browser when the page loaded, and the third row is the one that matters: the same inputs, two different answers.

    Each claim, whether it held, and the values behind it
    claimheldmeasured
    set it, take the input away, and it is still setyesS=1 gives Q=1, then S=0 gives Q=1
    reset it, take the input away, and it is still resetyesR=1 gives Q=0, then R=0 gives Q=0
    with both inputs off it gives two different answers, and that is the memoryyessame inputs, Q=1 or Q=0, decided by what came before
    from a held state, the outputs settle to opposites unless both inputs are onyesS=1 R=1 is the one where they are not
    in that one both outputs are 0, so a thing named NOT-Q equals QyesQ=0, NOT-Q=0
    all 8 input changes from the two held states settleyesstarting at Q=0, NOT-Q=1 or Q=1, NOT-Q=0; worst case 3 passes
    release both inputs from the forbidden state, and this model does not settleyesboth gates flip together for 12 passes; no physical timing is modelled to break their symmetry

    What is real here, and what is not

    The gates are real, the electrons are not

    Every number on this page comes out of two NOR functions evaluated in a loop until they agree, and the pass count is that loop's real length. What is not modelled is anything electrical: no propagation delay in nanoseconds, no rise time, no metastability. A real pair given both inputs and then released settles into one state or the other by a race this page cannot have, because it has no time in it, only passes. Releasing both inputs from the forbidden equal-output state makes this model alternate until its pass limit. The verification table used to call the loop settled after checking only the two complementary starting states. It now checks the non-settling release too, and the readout says when it reaches the limit instead of saying it settled.

    It is a NOR pair, and that is a choice

    The same idea works with NAND, where the forbidden combination is both inputs LOW rather than both high, and the held state is the other way round. NOR was chosen because Eccles and Jordan's circuit behaves this way round and because it makes the contradiction easy to reach on purpose rather than something a reader trips over.

    The date is the paper, not the invention

    This page dates the flip-flop to September 1919, when Eccles and Jordan published A trigger relay utilizing three-electrode thermionic vacuum tubes in The Electrician. Their patent, GB 148,582, was applied for in June 1918, so the circuit is a year older than the date on the chronology. The paper is dated because a publication can be checked and a laboratory notebook cannot.

    There is no sound here, deliberately

    A relay click would be evocative and would measure nothing. The rule on this site is that a sound has to carry the measurement, the way Morse's tone lasts exactly as long as the signal costs. Nothing here has a duration, so there is nothing to hear.

    Sources