Core Memory
Every memory you have ever used hands your value back and keeps it. This one hands it back and empties the drawer, and the machine has to put it away again before you notice. Pick a core below and drive the wires yourself.
The plane
1 Select: half a current down X, half down Y
Nothing selected. Choose a core, or a wire.
2 Sense: the flip is the signal, and silence is a zero
No read yet.
3 Destroyed: whatever it held, it holds zero now
Nothing has been destroyed yet.
4 Restore: write it back, or it is gone
- Selected
- none
- Cores at full current
- 0
- Cores at half
- 0
- Reads
- 0
- Bits lost
- 0
- Plane holds
- 0 ones
Undisturbed. Every core still holds what it was written with.
A core is an AND gate you can hold
A ferrite ring has two stable states and it takes a definite amount of current to move between them. Below that threshold it does not move a little; it does not move at all. That squareness is the whole trick.
So thread one wire through every core in a row and another through every core in a column, and send half the switching current down one of each. Every core in that row feels a half. Every core in that column feels a half. Only the core where the two wires cross feels both, and only that one flips.
One wire per row and one per column addresses a whole plane: 8 wires each way select any of 64 cores. That is the arithmetic that made core memory affordable, and it is an AND gate from 1937, rebuilt sixteen years later out of magnetism instead of contacts. Two switches in series; two half-currents that must arrive together.
Reading it is the same act as erasing it
Here is the part with no modern equivalent. There is no way to ask a core what it holds. The only question you can put to it is flip to zero, and then watch what happens.
If it was holding a one, the flip drags the magnetic field across and that moving field induces a pulse in a third wire threaded through every core in the plane. If it was already zero, nothing moves and no pulse arrives. The absence of a signal is the signal.
Which means that either way, the core is now zero. You have your answer and you no longer have your data. Every read is a destructive read, and the machine has to write the value straight back before anything else happens. That write-back is not an optimisation; it is the reason the memory works at all, and it is why a core cycle takes about twice as long as a core access.
Who invented it is genuinely disputed
Two patents matter, and the order they were filed in is the awkward part.
An Wang, with Way-Dong Woo at Harvard, filed first: US 2,708,722, "Pulse Transfer Controlling Devices", on 21 October 1949, granted 17 May 1955. It is the write-after-read cycle, the answer to storage that erases itself. IBM bought it in 1955 for $500,000.
Jay Forrester at MIT filed nineteen months later: US 2,736,880, "Multicoordinate Digital Information Storage Device", on 11 May 1951, granted 28 February 1956. That is the coincident-current selection above, and it is the one the industry treated as principal. IBM paid MIT $13 million for it in 1964, reported as the largest patent settlement to that date; Forrester personally received $1.5 million.
So Wang filed first, was granted first, and sold for a fortieth of what the later patent fetched. Some accounts describe his as covering a shift register rather than a coincident-current memory, and Forrester disputed its relevance outright in 2011: the Wang memory, he said, was "essentially a delay line that moved a bit forward".
Jan Rajchman at RCA built a third approach with ferrite bands wrapped on metal tubes, pressing his first examples in 1949 on a converted aspirin press.
Forrester's own account is the fairest summary anyone has given: "It took us about seven years to convince the industry that random-access magnetic-core memory was the solution to a missing link in computer technology. Then we spent the following seven years in the patent courts convincing them that they had not all thought of it first."
What is real here, and what is not
One plane is one bit of a word, not one word
The plane above holds 64 cores, and a machine word is not stored in it. It is stored across planes. Stack them, thread the same X and Y wires through every one, and a single address selects one core in each plane at the same moment. Each plane contributes one bit, and the sense wires read the whole word out in parallel.
Whirlwind's 32 by 32 by 16 is sixteen planes of 1,024 cores: one address, sixteen bits, at once. That is why core memory is drawn as a stack rather than a sheet, and why this page shows one sheet and calls it one bit of a word.
The rule is real; the physics is not simulated
A core here flips when the current it receives reaches the threshold, and does nothing below it. That is exactly the rule a real core obeys, and it is why half-selection works. What is not happening is any physics: there is no B–H curve being integrated, no domain-wall motion, no coercivity in amps per metre. The page models the behaviour, not the material.
The plane is 8 by 8; Whirlwind's was 32 by 32 by 16
Sixty-four cores fit on a screen and let you see a whole row and column light up at once. The first core memory installed on Whirlwind in the summer of 1953 was 32 by 32 by 16 bits, which is sixteen planes of a thousand cores each. The selection scheme is the same at both sizes; that is the point of it.
Real planes carry a fourth wire this page leaves out
Writing a one everywhere would be easy; writing a zero to one core needs a way to cancel the write at every other core on the selected lines. Real planes thread an inhibit wire for that, and later designs combined the sense and inhibit wires into one to simplify manufacture. This page has select and sense only, because the destructive read is the story and a fourth wire would crowd it.
The timings are quoted, not measured
Nine microseconds for core access against about twenty-five for the Williams tube it replaced comes from William Papian of Project Whirlwind, who was arguing for the change at the time. Nothing on this page is timed; the animation runs at whatever speed is legible.
Cores really were that small, and got smaller
About 0.1 inches (2.5 mm) across in the 1950s, down to 0.013 inches (0.33 mm) by 1966. The power needed to flip one goes with its volume, so that shrink is roughly a factor of 125 in switching power. The cores drawn here are not to any scale.
The attribution is contested and this page does not settle it
Forrester, Wang and Rajchman all have claims, the sources disagree about what Wang's patent actually covered, and Forrester disputed its relevance himself. Presenting one of them as the inventor would be tidier and less true.
Sources
- Computer History Museum, Magnetic Core Memory, for the ownership disputes and for the museum's own wording of Forrester's line, which is not the wording printed above: “It took about seven years to convince people in the industry that magnetic core memory would work, and it took the next seven years to convince them that they had not all thought of it first.” Same shape, different sentence. The version this page prints is the one that circulates most widely; the museum's is shorter and makes no claim about patent courts. Neither is dated, and no recording of either was found, so the page prints one and shows you the other rather than choosing quietly.
- Magnetic-core memory, an encyclopaedia and the weakest source here, kept for two things nothing better on this page carries: Forrester's April 2011 recollection about Wang's cores, and the core diameters. Everything it used to carry has moved: the coincident-current scheme and the destructive read to the Navy description and Forrester's own patent below, and the 32×32 Whirlwind plane to the museum. It is cited for what is left, and named for what it is.
- Computer History Museum, 1953: Whirlwind computer debuts core memory, for the installation date and the machine it went into.
- Computer History Museum, An Wang sells core memory patent to IBM, for the 1955 sale and the $500,000 figure.
- US 2,708,722 and US 2,736,880 themselves, for the filing and grant dates rather than somebody's summary of them.
- The Harvard Crimson, 15 April 1964, reporting the IBM settlement as it happened.
- Ed Thelen's archive, a US Navy description of core memory, and vt100.net, Magnetic Core Memories, for the hysteresis threshold and the half-current argument, independently of each other.