Page Fault

A program writes an address and expects something to be at it. On the Atlas in 1962 that address might be in core, or it might be on a magnetic drum, and Kilburn's one-level storage system made that not the programmer's business. What happens when it is on the drum is the part worth watching: the instruction does not fail and it does not half-finish. It stops, the operating system fetches the page, and the same instruction starts again. From inside the program nothing occurred except that it took a hundred thousand times longer.

One address, and everything the machine does with it

1 The address the program used, split into page and offset

A 16-bit address over 256-byte pages, so the page number is the top two hex digits and the offset is the bottom two. Nothing is decoded: the address is simply cut in half.

page number
0x01 (the top 8 bits)
offset within the page
0x42 (the bottom 8 bits)

2 The TLB, asked first because it is fast

The TLB holds two entries, which is small enough that you will see it miss. It is filled out of the page table and never written independently, so the two cannot disagree.

Each thing consulted, what it said, and what it cost
consultedwhat it saidticks
Nothing has been looked up yet.

3 The page table, for when the TLB has not heard of it

Four physical frames, which is far fewer than the 256 pages an address can name. That is the whole point: the address space is larger than the memory.

Each frame, the page currently in it, and the addresses that page covers
frameholdscovering
0page 0x000x0000 upward
1page 0x010x0100 upward
2empty
3empty
evicted so far
nothing has been evicted yet

4 The fault: trap, page in, and run the instruction again

the physical address
what this lookup cost
did the instruction run twice

Pick an address and look it up.

Every lookup so far. The second visit to an address is the row worth reading.

Each lookup: the virtual address, the physical address, whether it faulted, and what it cost
#virtualphysicaloutcometicks
faults so far
0
total cost
0 ticks

What this page checked when it loaded.

Each claim, whether it held, and the values behind it
claimheldmeasured
all 65,536 addresses split and rejoin to themselvesyes
the offset survives translation unchangedyes0x0142 -> 0x0042
an address that faulted works on the retryyesboth give 0x0100
and the second access costs a tiny fraction of the firstyes100011 ticks then 1
every TLB entry agrees with the page tableyes

What is real here, and what is not

The ticks are a ratio, not a measurement

A TLB hit costs 1, a page table read costs 10, and a fault costs 100,000. Nothing was timed to get those. What they are meant to carry is the SHAPE: a fault is not somewhat slower than a hit, it is four to six orders of magnitude slower, because it involves a mechanical device. The Atlas drum had an average access of about 6 milliseconds against a core cycle of 2 microseconds, which is a factor of roughly three thousand; a modern disk against a modern cache is worse. Rounding that to 100,000 keeps the shape and admits the number is chosen.

Eviction here is not what any real system does

When the frames are full this evicts the resident page with the lowest number. That is not least-recently-used, not clock, and not working set. Choosing a victim well is a whole subject — Denning's working set paper is in the sources and is about exactly this — and implementing a policy whose reasoning is never shown on screen would be worse than admitting to a simple one. The eviction column says which page went, so you can see it is arbitrary.

The TLB cannot disagree with the page table here, and in real hardware it can

This machine fills the TLB from the page table and never writes it separately, so the two are always consistent. Real hardware has exactly the opposite problem: change a page table entry and the TLB still holds the old translation until something invalidates it. That is what a TLB shootdown is, it is expensive, and getting it wrong is a genuine class of operating system bug. None of that is modelled here.

A real address translation is several levels deep

One flat table of 256 entries is shown because it fits on a screen. A 64-bit machine cannot have a flat table — it would be larger than memory — so the page number is itself split into four or five pieces indexing a tree of tables, and a TLB miss then costs four or five memory reads rather than one. The mechanism is the same at every level, which is why it is drawn once.

Sources